Microchip's Andrew Rogers looks at the advantages of HSIC over USB and the connection process involved.
High-speed inter-chip (HSIC) interfaces have become increasingly popular because of their significant advantages over USB in hard-wired inter-chip applications. The interface is a synchronous interface of two signal sources, which can provide 480Mbit / s USB high-speed data. Data transfer is a 100% host driver compatible with traditional USB topologies. This format does not support full speed (FS) and low speed (LS), but a hub with HSIC can provide FS and LS support.
This interface differs from USB only at the physical layer. Important functions include wireless FM protocol, source synchronous serial data transmission, no hot delete or attach (because the interface is always connected).
It has a 1.2V signal level and is designed for low-power applications with standard LV CMOS levels. The maximum trace length is 10 cm.
The protocol for data transmission between the host and the device through HSIC is the same as USB, as shown in Figure 1.
Figure 1. Data packet transmission from host to device
The main difference is that all information is transmitted through a data line, and the strobe signal communicates when sampling the received data signal. HSIC uses double data rate (DDR) signaling; data is sampled on both the rising and falling edges of the strobe signal. The strobe signal oscillates at a frequency of 240MHz, which provides a total data rate of 480Mbit / s.
Advantages over USB
As mentioned above, HSIC has obvious advantages over USB. First, it is an all-digital standard, so no analog front end is required. The lack of an analog front end means that the chip size can be reduced, thereby reducing costs. As the amount of digital logic required for the simplified connection protocol is reduced, the die can also be reduced.
The HSIC standard does not substantially reduce power consumption, but removing the analog front end can reduce power consumption, especially because analog circuits do not have to correspond one-to-one with digital circuits, thereby reducing process size. The power consumption when the HSIC is in the suspended state is particularly low because there is no current consumption on the gate or data lines. In contrast, standard USB consumes at least 200μA on D + through a 1.5kΩ pull-up resistor when suspended.
Since HSIC is only different from USB at the physical layer, the migration from USB to HSIC is not like changing to a new standard. This means that the existing USB software stack and USB protocol knowledge base can quickly transition to HSIC.
Data sampling
With standard USB, each data packet starts in synchronous mode to synchronize the phase of the receiver clock with the input data. Then the differential sign of the D + / D- signal is sampled according to the synchronization pattern. HSIC uses a separate gate line to tell the receiver when to sample incoming data. The HSIC data signal is sampled on the rising and falling edges of the strobe signal. If the strobe signal and data signal are skewed for any reason, the sampled data may be damaged. The HSIC electrical specification defines the maximum allowable deflection as 15ps.
To ensure that there is no skew, the HSIC traces must be kept as short as possible, and the length must not exceed 10cm. The length of the data and strobe traces must be the same, and they should be routed to 50Ω single-ended impedance.
To illustrate the possible amount of skew in the real world, Figure 2 shows the beginning of a test packet sent from the host to devices of equal length.
Figure 2. Equal HSIC trace length
The same data packet with the strobe trajectory sent from the same host about 10cm longer than the data trajectory is shown in Figure 3. The resulting time lag is approximately half a nanosecond. This is an extreme example, but the results show that even a small amount of length mismatch can lead to violations of HSIC regulations.
Figure 3. Strobe tracking is 10cm longer than data tracking
When trying to probe HSIC lines, the single-ended nature and the difference in signal termination can cause some difficulties. By placing the differential probe connected to the oscilloscope on the transmitter side or receiver side, you can easily monitor and decrypt standard USB signals. HSIC signals are more sensitive, so transmission line theory should be considered when trying to detect them.
A good general guideline is to probe on the side opposite to the signal source to be observed. For example, to observe the signal from the device, place the probe on the terminal on the host side. To observe the signal from the host, place the probe on the terminal on the device side.
When attempting to detect the signal from the device when detecting on the device side, the signal will be distorted. This may be due to interference caused by the signal being reflected back to itself. It is also possible to detect the middle of the trace, but the result is usually not as clean as the correct detection from one side. It is ideal to detect from both ends simultaneously. A serial protocol analyzer may be able to accurately sample the signal in both directions, but the 10cm trace length limitation makes this option impractical.
establish connection
The structure of the HSIC interface allows the host or peripheral devices to be turned on in any order. To ensure that no erroneous connections are detected, the host, hub, and peripherals must ensure that the strobe or data lines do not float to uncertain values, commonly referred to as tri-state.
Figure 4 shows the oscilloscope's capture of the connection sequence. This connection sequence is much simpler than the USB connection sequence because there is no speed to negotiate. This sequence can be handled by a very simple state machine, thereby reducing die size requirements.
Figure 4. Connection sequence from idle and pause to connection and resume signaling
Using standard USB, the host can determine whether the downstream port is disconnected by monitoring the DP / DM signal voltage. If the voltage exceeds the disconnection voltage threshold, the host can conclude that the device has been disconnected. HSIC does not support the disconnect protocol because it is designed to remain connected at all times through hard wiring. However, it may still happen that the downstream device seems to have been disconnected, so care must be taken to ensure that the host does not permanently lose the connection to the device.
The reason for this obvious disconnection or deadlock is because the host always remains idle when the bus is not in use, and from the signal point of view, the idle state is the same as the suspended state. The host cannot know whether the downstream equipment has been turned off or when the power was disconnected. Because the pause signaling is the same as the idle signaling, it is possible to reach the following state: the downstream device thinks that the device has been suspended, and the upstream host thinks that there is no device downstream and waits indefinitely for the connection signal to arrive. If the upstream host disables the port while the device thinks it has been suspended, a similar deadlock situation may occur.
This is unlikely to happen between the host and the device that will never restart the power supply or perform a soft reset. If you encounter this problem, you must deal with it at the link or software stack level in an application-specific manner. This can be done by programming the software stack or designing links to prevent this from happening in the first place. Alternatively, the SoC can try to process downstream devices after resetting the HSIC hub and disconnecting. The device discovery sequence will occur and the connection will be re-established.
On Microchip's USB254x, USB3613, USB3813, USB4604 and USB4624 devices, the SoC can use the VBUS_-DET pin to re-establish the connection. Pulling the pin low will leave the hub floating, and pulling the pin high will wake it up.
in conclusion
As long as the correct connection and disconnection procedures are followed, the HSIC standard has advantages over USB in hard-wired applications. These processes are especially important when troubleshooting certain issues involving HSIC connections.
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