How can low-noise and low-ripple design techniques enhance power and signal integrity | Heisener Electronics
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How can low-noise and low-ripple design techniques enhance power and signal integrity

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投稿日: 2023-09-21

A common problem engineers face when designing power supplies for noise-sensitive systems using clocks, data converters or amplifiers for medical applications, test and measurement, and wireless infrastructure is how to improve accuracy and precision and minimize system noise. The noise described in this article refers to the low frequency thermal noise generated by the resistors and transistors in the circuit. Noise in the bandwidth from 10Hz to 100kHz in the noise spectral density curve (in microvolts/square root Hertz) can generally be considered as integrated output noise (in RMS millivolts). Power supply noise can degrade the performance of the AD converter and cause clock jitter.

Previously, a DC/DC converter (or module), a low voltage drop regulator (LDO)(e.g., TPS7A94, TPS7A82, TPS7A84, TPS7A52, TPS7A53, or TPS7A54), and a ferrite magnetic bead filter were used to power a clock, data converter, or amplifier. As shown in Figure 1. This design method minimizes power supply noise and ripple and maintains good performance when the load current is below 2A or so. However, as the load increases, the power loss in the LDO raises efficiency and thermal management issues, for example, a post-stabilized LDO can add 1.5W of power loss in a typical analog front-end application. Is an efficient design with low noise impossible? Not necessarily.

Figure 1: Typical low noise architecture using DC/DC (DC/DC) converters, Ldos, and ferrite bead filters

   

Replace the LDO with a low noise buck converter or module

One way to prevent generating power losses is to minimize the voltage drop through the LDO. However, this approach can have a negative impact on noise performance. In addition, Ldos with higher currents are usually larger, which increases the design size and cost. A more efficient way to ensure low noise without increasing power loss is to replace the LDO in your design with a low-noise DC/DC buck converter or module, as shown in Figure 2.

Figure 2: Using a low noise buck converter (no LDO)

    

I know your question: How can you remove the main noise reduction device and still provide low noise power? In fact, many Ldos have a low-pass filter at the bandgap reference to minimize noise entering the error amplifier. The TPS62912 and TPS62913 series low noise buck converters and TPSM82912 and TPSM82913 modules connect capacitors using noise reduction/soft start pins and form a low pass resistor/capacitor filter with integrated Rf and externally connected CNR/SS. As shown in Figure 3.

In essence, this structure simulates the performance of the bandgap low-pass filter in the LDO. If the TPS62913 or TPSM82913 still do not meet your low noise requirements, you can use a low noise LDO with a higher low voltage drop and power consumption, such as the TPS7A94, which can still achieve ultra-low noise. The Application Brief SBVA099 explains this in more detail.

Figure 3: Low noise buck block diagram with bandgap noise filtering

    

How to reduce output voltage ripple?

All DC/DC converters produce an output voltage ripple at their switching frequency. In precision systems, noise-sensitive analog power rails require ultra-low supply voltage ripple to minimize frequency stray in the spectrum, which typically depends on the DC/DC converter's switching frequency, inductance value, output capacitance, equivalent series resistance, and equivalent series inductance. To reduce the ripple generated by these components, engineers typically use Ldos and/or small ferrite beads and capacitors to form a pi-type filter, thereby minimizing load ripple.

Low ripple buck converters such as TPS62912 and TPS62913 and the TPSM82913 module make full use of ferrite magnetic bead filters by integrating ferrite magnetic bead compensation and remote sensing feedback. By utilizing the inductance of the ferrite bead and the additional output capacitor, the high-frequency component of the output voltage ripple is eliminated and the ripple is reduced by about 30dB, as shown in Figure 4.

Figure 4: Output voltage ripple (a) before the use of a ferrite bead filter; Output voltage ripple after using ferrite bead filter (b)

Conclusion

By integrating features that reduce system noise and ripple, low noise buck converters help engineers achieve low noise power solutions that do not use Ldos. Of course, different applications require different noise levels, and different output voltages require different performance. So, you can only choose the right low-noise architecture for your design. If you want to simplify your noise-sensitive analog power supply design, reduce power losses, and shrink your overall design size, consider a low-noise buck converter.


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