Hybrid digital dual pwm controller | Heisener Electronics
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Hybrid digital dual pwm controller

Technology Cover
投稿日: 2023-01-07, Intersil

    The ISL6367 is a hybrid digital dual PWM controller designed to comply with Intel VR12/IMVP7 specifications. Its 6-phase PWM controls the microprocessor core or memory voltage regulator, while its single-phase PWM controls the graphics, system agent, or peripheral voltage regulator for processor I/O. It includes easy-to-use programmable features and telemetry, high system flexibility and overclocking applications, using the SMBus, PMBus or i2c (Modified) interface, and is designed to conflict free with the CPU's SVID bus. This hybrid digital approach eliminates the need for NVMS and firmware commonly found in all-digital solutions, and significantly reduces design complexity, inventory, and manufacturing costs.

    The ISL6367 uses Intersil's proprietary Enhanced Active Pulse positioning (EAPP) modulation scheme to achieve extremely fast transient responses with fewer output capacitors. The ISL6367 accurately monitors the load current via the IMON pins and reports this information via the IOUT register to the microprocessor, which sends a PIS # signal to the controller via the SVID bus in low power mode. The controller enters phase 1 or phase 2 operation in low power mode (PSI1). In ultra-low power mode (PSI2,3), it works in single phase diode emulation options. In low-power mode, core and switching losses are significantly reduced, resulting in high efficiency under light loads. After the P s # signal is de-asserted, the descending phase (s) is added back to maintain the heavy-duty transient response and efficiency.

    In addition, the ISL6367 features automatic phase shedding to optimize efficiency from light to fully loaded green environments without sacrificing transient performance. Today's microprocessors require a strictly regulated output voltage position with the load current (droop). The ISL6367 continuously detects the output current by measuring a dedicated current detection resistor or a DCR of the output inductance. The induced current flows out of the FB pin and forms a precise voltage drop through the feedback resistance for sagging control.

    The current sensing circuit also provides the signals needed for channel current balancing, average overcurrent protection, and individual phase current limiting. TM and TMS pins sense the temperature of the NTC thermistor, which is digitized internally for thermal monitoring and integrated thermal compensation of the respective regulator's current sensing element. The ISL6367 senses input current to provide a true catastrophic failure protection (CFP) output. It also has remote voltage sensing capabilities that completely eliminate any potential differences between remote and local ground. This improves adjustment and protection accuracy. Threshold sensitive enable inputs can be used to precisely coordinate the start of ISL6367 with other voltage rails.

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